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Analog / Mixed-Signal PLL Design Engineer, Senior - Cork, Ireland
- Qualcomm
- Cork, Ireland
- Level:Senior
- Posted
Source: Qualcomm’s own career site First seen
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##. Company: QT Technologies Ireland Limited. ## Job Area: Engineering Group, Engineering Group > ASICS Engineering. General Summary: About the role. Qualcomm’s Mixed-Signal IP high-speed clocking and Phased Locked Loop (PLL) design team is seeking Analog / Mixed-Signal design engineers to join our team in Cork, Ireland.
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